The present application is a continuation-in-part application of US patent application filed on Sep. 2, 1997, based on Japanese Patent Application No. 8-233045, which is currently pending.
1. Field of the Invention
The present invention relates to a router apparatus which switches packets entailing the processing of a packet switching type layer 3 like IP (Internet Protocol), etc. by using an ATM (Asynchronous Transfer Mode, and particularly to a router apparatus for multiplexing plural transmission paths for one physical port of the ATM switch.
2. Description of the Related Art
An IP (Internet Protocol) switching network which has been proposed by Epsilon Company has been known as a network which enables high-speed IP-packet transmission by using an ATM technique. As shown in FIG. 48, this network includes an IP switch 1 and an IP switch gateway 2, and enables high-speed transmission and switching of IP packets which have been communicated between conventional LAN/IP networks such as Ethernet, FDDI or the like which is connected to the IP switch gateway 2.
In FIG. 48, a network is illustrated as being divided into a layer 2 (base or subordinate) and a layer 3 (enhancement or superordinate), and a heavy line connecting both the layers 2 and 3 represents the shift of processing between the layers. An IP node 4 serving as a router of a LAN?IP network or the like first performs LAN protocol processing of the layer 2 of Ethernet or the like on an arriving packet (datagram), and then performs IP protocol processing of the layer 3 of the superordinate (i.e., enhancement layer 3) on the packet. Subsequently, after a route through which the packet will be transmitted is determined, the processing of the layer 2 is performed again and the packet is transmitted to an adjacent node. In the IP switch gateway 2 of the IP switching network, the processing of the layer 2 and the processing of the layer 3 are also performed on all the packets to be transmitted. The IP switch 1 also performs the processing of the layers 2 and 3, however, packets which are cut through in communications between an IP switch gateway 2 and an IP switch 1 or between IP switches 1 are subjected to only the processing of the layer 2, and then transmitted. In FIG. 48, heavy lines which should be originally illustrated between the layers 2 and 3 are replaced by heavy dotted lines in order to show that the processing of the layer 3 is cut through.
FIG. 49 shows a constitution example of the IP switch 1 and the IP switch gateway 2. The IP switch 1 comprises an ATM switch 11 and an IP controller 12, and it switches ATM cells with the IP switch gateway 2 connected to the physical port of the ATM switch 11 and with an IP node 3 for performing ATM communications. The IP switch gateway 2 comprises plural LAN interfaces 21A, 21B each of which is individually connected to each transmission path of the LAN?IP network connected to the IP node 4, an IP datagram multiplexing/ demultiplexing unit 22 for multiplexing/demultiplexing IP packets which are communicated in the LAN interface, an IP processor 23, and an ATM interface 24 which is connected to the physical port of the ATM switch 11. In this constitution, the IP controller 12 of the IP switch 1 and the IP processor 23 of the IP switch gateway 2 perform communication control on IP in cooperation with each other on the basis of a protocol which is called IFMP (Ipsilon Flow Management Protocol). Here, xe2x80x9cflowxe2x80x9d represents a train of packets which are transmitted from a transmitting side (transmission source) terminal to a transmitted side (transmission destination) terminal, for example. The IP controller 12 controls VC (Virtual Channel) connection in cooperation with the ATM switch 11 on the basis of a protocol which is called GSMP (General Switch Management Protocol).
The communication between the IP switch gateways 2 which are connected to each other through the IP switch 1 will be described with reference to FIG. 50. IP packets A and B which are transmitted from plural IP nodes 4 of the LAN?IP network to the IP switch gateway 2 are serially multiplexed in this order in the IP datagram multiplexing/demultiplexing unit 22. After the multiplexed IP packets are successively subjected to IP processing in the IP processor 23, they are converted to ATM cells in the ATM interface 24 and then transmitted to the IP switch 1. The ATM cells which are transmitted to the IP switch 1 are transmitted to the IP switch gateway 2 serving as a transmitting side, and processed in the ATM interface 24 and the IP processor 23. Thereafter, the ATM cells thus processed are successively synthesized into IP packets in the IP datagram multiplexing/ demultiplexing unit 22 and then transmitted to the LAN interface 21 serving as a transmitted side. After receiving all data of the IP packet, each LAN interface 21 individually transmits the IP packet to the transmission path of the LAN?IP network.
In the conventional system, all the IP packets which are transmitted by the IP switch gateway 2 must be processed in the IP processor 23, and thus the amount of communication to be performed in the IP switch gateway 2 is restricted, so that the multiplicity of the communication in the overall system cannot be enhanced.
Further, in the IP switch gateway 2, the IP packet is serially multiplexed and then subjected to the IP processing. Therefore, as shown in FIG. 50, when an IP packet A having a large data amount is transmitted from a transmission path, the processing and the transmission of an IP packet B which is transmitted from another transmission path are greatly delayed. This is a critical drawback in a public network which needs fairness with respect to access.
Still further, when applied to a public network, not only a service of IP packets, but also various services of frame relays, low-speed ATMs, channel emulation, etc are required, however, the IP switch gateway 2 is structurally restricted so that it can support only the service of IP packets and thus the practical use of the network is restricted.
Therefore, the present invention has an object to provide a router apparatus which enhances the multiplicity of communications performed through an ATM switch.
Further, the present invention has another object to provide a router apparatus which reduces the delay variation between communications of different multiplexing transmission paths.
Still further, the present invention has a further object to provide a router apparatus which can support various types of communications.
In order to attain the above objects, a router apparatus according to the present invention in which packets entailing the processing of a packet switching type layer 3 in a communication are switched by using an ATM switch, is characterized by comprising an ATM switch for switching cells, plural interfaces which are connected to plural transmission paths for transmitting the packets, a cell multiplexing/demultiplexing unit which is connected to one physical port of the ATM switch and the plural interfaces, and a layer 3 controller for executing and managing the processing of the layer 3 in the apparatus itself, wherein each interface comprises means for converting packets transmitted from the connected transmission path to cells and then transmitting the cells to the cell multiplexing/ demultiplexing unit, means for converting the cells transmitted from the cell multiplexing/demultiplexing unit to packets and then transmitting the packets thus obtained to the transmission path being connected, and means for converting information on the header portions of the cells and the packets which are transmitted and received for processing of the layers, and the cell multiplexing/ demultiplexing unit includes means for serially multiplexing cells transmitted from the plural interfaces being connected and then transmitting the serially-multiplexed cells to the ATM switch, and means for demultiplexing the cells transmitted from the ATM switch and distributing the separated cells to the interface connected to the transmission path serving as the transmission destination, wherein on the basis of a communication indicating plural kinds of identification information for identifying flow of a cell or packet, which contain logical port numbers set for each interface and a non-connected physical port of the ATM switch of the cell multiplexing/ demultiplexing unit, logical channel information set for the flow of the cell at the interface and the physical port, and address information of the layer 3 set for the flow of the packet at the interface, the layer 3 controller executes the processing of the layer 3 in cooperation with the interface and the ATM switch to alter the content of the switching of the packet.
According to the router apparatus as described above, the processing of the packet switching type layer 3 and the cellularizing processing are performed in each interface, and the cell multiplexing processing is performed in the cell multiplexing/demultiplexing unit, so that the packet communication delay which needs the processing of the layer 3 can be reduced and thus the multiplicity of the flow of the packets in the apparatus itself can be enhanced.
Further, in the router apparatus as described above, the serially multiplexing means of the cell multiplexing/demultiplexing unit multiplexes the cells transmitted from the plural interfaces being connected on a cell basis so that the communication delay variation between the interfaces is reduced.
Still further, according to the present invention, a router apparatus for switching data blocks of communications other than a normal ATM communication by using an ATM switch, is characterized by including an ATM switch for performing cell switching, plural interfaces which are connected to one or plural transmission paths for plural separate kinds of data blocks containing packets which entail the processing of the packet switching type layer 3 in the communication, a cell multiplexing/demultiplexing unit which is connected to one physical port of the ATM switch and the plural interfaces, and a layer 3 controller for executing and managing the processing of the layer 3 in the apparatus thereof, wherein each of the interfaces includes: means for converting the data blocks transmitted from the transmission path to cells of a common format and transmitting the cells to the cell multiplexing/demultiplexing unit; means for converting the cells transmitted from the cell multiplexing/demultiplexing unit to the data blocks corresponding to the communication through the connected transmission path; and means which is provided when the processing of the layer 3 is needed and adapted to convert the information of the header portions of the cells and the data blocks to be received and transmitted for the processing of the layer 3, the cell multiplexing/demultiplexing unit includes: means for serially multiplexing the cells transmitted from the plural interfaces and transmitting the serially-multiplexed cells to the ATM switch; and means for demultiplexing the cells transmitted from the ATM switch and distributing the cells to the interface connected to the transmission path serving as a transmission destination, and the layer 3 controller executes the processing of the layer 3 in cooperation with an interface and an ATM switch to alter the content of the switching of the packet on the basis of a communication indicating plural kinds of identification information for identifying flow of the cell or the packet, which contain logical port numbers set for each interface and a non-connected physical port of the ATM switch of the cell multiplexing/demultiplexing unit, logical channel information set for the flow of the cell at the interface and the physical port, and address information of the layer 3 set for the flow of the packet at the interface.
According to the router apparatus, the multiplexing and switching processing can be performed not only on the communication of packets which need the processing of the packet switching type layer 3, but also on various kinds of communication such as the communication of cells which need the processing of the layer 3, the communication which does not need the processing of the layer 3, the communication of channel switching, etc.